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aarch64: widen f16 comparisons when FP16 is unavailable - #14521

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dotcom07 wants to merge 2 commits into
bytecodealliance:mainfrom
dotcom07:fix/aarch64-f16-fcmp
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dotcom07 wants to merge 2 commits into
bytecodealliance:mainfrom
dotcom07:fix/aarch64-f16-fcmp

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@dotcom07 dotcom07 commented Oct 4, 2026

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Fixes #14510.

When an f16 comparison is folded into a branch or select, AArch64 can emit fcmp hN, hM even with has_fp16 disabled. This instruction requires Arm's half-precision floating-point arithmetic extension (FEAT_FP16), so these comparisons can trap on CPUs without that feature.

This widens both operands to f32 in the shared comparison helper when FP16 is unavailable. The scalar f16-to-f32 fcvt conversion does not require FEAT_FP16. This also allows standalone f16 comparisons and zero-extended comparison results to use the same fallback.

Adds precise-output tests for the generated comparisons, an encoding test for the conversion, and runtime tests covering NaNs, signed zeros, infinities, and subnormals. The runtime tests were run on Apple Silicon with has_fp16 enabled and disabled.

@dotcom07
dotcom07 requested a review from a team as a code owner October 4, 2026 09:08
@dotcom07
dotcom07 requested review from cfallin and removed request for a team October 4, 2026 09:08

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SIGILL on aarch64 using f16 in comparisons on CPUs that don't have FP16 enabled

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